# INFO This file automatically generated by andre on Thu May 10 11:02:19 2018
# INFO Direct edits to this file may be lost in future updates
# INFO Command line arguments: ['--sinc', '--cpuid-match', '^AVX2\\b', '--skip-sinc', '../../../Processors/x86/data/languages/avx2_manual.sinc']

# MOVNTDQA 4-92 PAGE 1212 LINE 63086
define pcodeop vmovntdqa_avx2 ;
:VMOVNTDQA YmmReg1, m256 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x2A; YmmReg1 ... & m256
{
	YmmReg1 = vmovntdqa_avx2( m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# MPSADBW 4-136 PAGE 1256 LINE 65140
define pcodeop vmpsadbw_avx2 ;
:VMPSADBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, imm8 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x42; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vmpsadbw_avx2( vexVVVV_YmmReg, YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PABSB/PABSW/PABSD/PABSQ 4-180 PAGE 1300 LINE 67311
define pcodeop vpabsb_avx2 ;
:VPABSB YmmReg1, YmmReg2_m256 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x1C; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpabsb_avx2( YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PABSB/PABSW/PABSD/PABSQ 4-180 PAGE 1300 LINE 67314
define pcodeop vpabsw_avx2 ;
:VPABSW YmmReg1, YmmReg2_m256 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x1D; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpabsw_avx2( YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PABSB/PABSW/PABSD/PABSQ 4-180 PAGE 1300 LINE 67317
define pcodeop vpabsd_avx2 ;
:VPABSD YmmReg1, YmmReg2_m256 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x1E; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpabsd_avx2( YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PACKSSWB/PACKSSDW 4-186 PAGE 1306 LINE 67637
define pcodeop vpacksswb_avx2 ;
:VPACKSSWB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x63; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpacksswb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PACKSSWB/PACKSSDW 4-186 PAGE 1306 LINE 67641
define pcodeop vpackssdw_avx2 ;
:VPACKSSDW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x6B; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpackssdw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PACKUSDW 4-194 PAGE 1314 LINE 68090
define pcodeop vpackusdw_avx2 ;
:VPACKUSDW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & vexVVVV_YmmReg; byte=0x2B; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpackusdw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PACKUSWB 4-199 PAGE 1319 LINE 68370
define pcodeop vpackuswb_avx2 ;
:VPACKUSWB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x67; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpackuswb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDB/PADDW/PADDD/PADDQ 4-204 PAGE 1324 LINE 68666
define pcodeop vpaddb_avx2 ;
:VPADDB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xFC; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDB/PADDW/PADDD/PADDQ 4-204 PAGE 1324 LINE 68668
define pcodeop vpaddw_avx2 ;
:VPADDW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xFD; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDB/PADDW/PADDD/PADDQ 4-204 PAGE 1324 LINE 68670
define pcodeop vpaddd_avx2 ;
:VPADDD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xFE; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDB/PADDW/PADDD/PADDQ 4-204 PAGE 1324 LINE 68672
define pcodeop vpaddq_avx2 ;
:VPADDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD4; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDSB/PADDSW 4-211 PAGE 1331 LINE 69045
define pcodeop vpaddsb_avx2 ;
:VPADDSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xEC; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddsb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDSB/PADDSW 4-211 PAGE 1331 LINE 69048
define pcodeop vpaddsw_avx2 ;
:VPADDSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xED; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDUSB/PADDUSW 4-215 PAGE 1335 LINE 69263
define pcodeop vpaddusb_avx2 ;
:VPADDUSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xDC; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddusb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PADDUSB/PADDUSW 4-215 PAGE 1335 LINE 69266
define pcodeop vpaddusw_avx2 ;
:VPADDUSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xDD; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpaddusw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PALIGNR 4-219 PAGE 1339 LINE 69489
define pcodeop vpalignr_avx2 ;
:VPALIGNR YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, imm8 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x0F; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpalignr_avx2( vexVVVV_YmmReg, YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PAND 4-223 PAGE 1343 LINE 69680
define pcodeop vpand_avx2 ;
:VPAND YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xDB; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpand_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PANDN 4-226 PAGE 1346 LINE 69856
define pcodeop vpandn_avx2 ;
:VPANDN YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xDF; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpandn_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PAVGB/PAVGW 4-230 PAGE 1350 LINE 70091
define pcodeop vpavgb_avx2 ;
:VPAVGB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE0; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpavgb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PAVGB/PAVGW 4-230 PAGE 1350 LINE 70094
define pcodeop vpavgw_avx2 ;
:VPAVGW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE3; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpavgw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PBLENDVB 4-234 PAGE 1354 LINE 70300
define pcodeop vpblendvb_avx2 ;
:VPBLENDVB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, Ymm_imm8_7_4 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x4C; YmmReg1 ... & YmmReg2_m256; Ymm_imm8_7_4
{
	YmmReg1 = vpblendvb_avx2( vexVVVV_YmmReg, YmmReg2_m256, Ymm_imm8_7_4 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PBLENDW 4-238 PAGE 1358 LINE 70525
define pcodeop vpblendw_avx2 ;
:VPBLENDW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, imm8 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x0E; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpblendw_avx2( vexVVVV_YmmReg, YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPEQB/PCMPEQW/PCMPEQD 4-244 PAGE 1364 LINE 70830
define pcodeop vpcmpeqb_avx2 ;
:VPCMPEQB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x74; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpeqb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPEQB/PCMPEQW/PCMPEQD 4-244 PAGE 1364 LINE 70833
define pcodeop vpcmpeqw_avx2 ;
:VPCMPEQW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x75; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpeqw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPEQB/PCMPEQW/PCMPEQD 4-244 PAGE 1364 LINE 70837
define pcodeop vpcmpeqd_avx2 ;
:VPCMPEQD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x76; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpeqd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPEQQ 4-250 PAGE 1370 LINE 71171
define pcodeop vpcmpeqq_avx2 ;
:VPCMPEQQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x29; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpeqq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPGTB/PCMPGTW/PCMPGTD 4-257 PAGE 1377 LINE 71508
define pcodeop vpcmpgtb_avx2 ;
:VPCMPGTB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x64; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpgtb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPGTB/PCMPGTW/PCMPGTD 4-257 PAGE 1377 LINE 71511
define pcodeop vpcmpgtw_avx2 ;
:VPCMPGTW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x65; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpgtw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPGTB/PCMPGTW/PCMPGTD 4-257 PAGE 1377 LINE 71514
define pcodeop vpcmpgtd_avx2 ;
:VPCMPGTD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x66; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpgtd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PCMPGTQ 4-263 PAGE 1383 LINE 71835
define pcodeop vpcmpgtq_avx2 ;
:VPCMPGTQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x37; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpcmpgtq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHADDW/PHADDD 4-280 PAGE 1400 LINE 72633
define pcodeop vphaddw_avx2 ;
:VPHADDW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x01; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphaddw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHADDW/PHADDD 4-280 PAGE 1400 LINE 72636
define pcodeop vphaddd_avx2 ;
:VPHADDD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x02; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphaddd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHADDSW 4-284 PAGE 1404 LINE 72824
define pcodeop vphaddsw_avx2 ;
:VPHADDSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x03; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphaddsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHSUBW/PHSUBD 4-288 PAGE 1408 LINE 73038
define pcodeop vphsubw_avx2 ;
:VPHSUBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x05; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphsubw_avx2( YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHSUBW/PHSUBD 4-288 PAGE 1408 LINE 73041
define pcodeop vphsubd_avx2 ;
:VPHSUBD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x06; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphsubd_avx2( YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PHSUBSW 4-291 PAGE 1411 LINE 73200
define pcodeop vphsubsw_avx2 ;
:VPHSUBSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x07; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vphsubsw_avx2( YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMADDUBSW 4-298 PAGE 1418 LINE 73555
define pcodeop vpmaddubsw_avx2 ;
:VPMADDUBSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x04; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaddubsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMADDWD 4-301 PAGE 1421 LINE 73704
define pcodeop vpmaddwd_avx2 ;
:VPMADDWD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF5; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaddwd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXSB/PMAXSW/PMAXSD/PMAXSQ 4-304 PAGE 1424 LINE 73891
define pcodeop vpmaxsb_avx2 ;
:VPMAXSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x3C; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxsb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXSB/PMAXSW/PMAXSD/PMAXSQ 4-304 PAGE 1424 LINE 73894
define pcodeop vpmaxsw_avx2 ;
:VPMAXSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xEE; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXSB/PMAXSW/PMAXSD/PMAXSQ 4-304 PAGE 1424 LINE 73897
define pcodeop vpmaxsd_avx2 ;
:VPMAXSD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x3D; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxsd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXUB/PMAXUW 4-311 PAGE 1431 LINE 74289
define pcodeop vpmaxub_avx2 ;
:VPMAXUB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & vexVVVV_YmmReg; byte=0xDE; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxub_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXUB/PMAXUW 4-311 PAGE 1431 LINE 74292
define pcodeop vpmaxuw_avx2 ;
:VPMAXUW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & vexVVVV_YmmReg; byte=0x3E; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxuw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMAXUD/PMAXUQ 4-316 PAGE 1436 LINE 74537
define pcodeop vpmaxud_avx2 ;
:VPMAXUD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x3F; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmaxud_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINSB/PMINSW 4-320 PAGE 1440 LINE 74742
define pcodeop vpminsb_avx2 ;
:VPMINSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & vexVVVV_YmmReg; byte=0x38; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminsb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINSB/PMINSW 4-320 PAGE 1440 LINE 74745
define pcodeop vpminsw_avx2 ;
:VPMINSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & vexVVVV_YmmReg; byte=0xEA; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINSD/PMINSQ 4-325 PAGE 1445 LINE 74992
define pcodeop vpminsd_avx2 ;
:VPMINSD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x39; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminsd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINUB/PMINUW 4-329 PAGE 1449 LINE 75201
define pcodeop vpminub_avx2 ;
:VPMINUB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & vexVVVV_YmmReg; byte=0xDA; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminub_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINUB/PMINUW 4-329 PAGE 1449 LINE 75204
define pcodeop vpminuw_avx2 ;
:VPMINUW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & vexVVVV_YmmReg; byte=0x3A; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminuw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMINUD/PMINUQ 4-334 PAGE 1454 LINE 75448
define pcodeop vpminud_avx2 ;
:VPMINUD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x3B; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpminud_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVMSKB 4-338 PAGE 1458 LINE 75655
define pcodeop vpmovmskb_avx2 ;
:VPMOVMSKB Reg32, YmmReg2 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG); byte=0xD7; Reg32 & (mod=0x3 & YmmReg2)
{
	Reg32 = vpmovmskb_avx2( YmmReg2 );
	# TODO Reg64 = zext(Reg32)
}

# PMOVSX 4-340 PAGE 1460 LINE 75782
define pcodeop vpmovsxbw_avx2 ;
:VPMOVSXBW YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x20; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovsxbw_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVSX 4-340 PAGE 1460 LINE 75784
define pcodeop vpmovsxbd_avx2 ;
:VPMOVSXBD YmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x21; YmmReg1 ... & XmmReg2_m64
{
	YmmReg1 = vpmovsxbd_avx2( XmmReg2_m64 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVSX 4-340 PAGE 1460 LINE 75786
define pcodeop vpmovsxbq_avx2 ;
:VPMOVSXBQ YmmReg1, XmmReg2_m32 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x22; YmmReg1 ... & XmmReg2_m32
{
	YmmReg1 = vpmovsxbq_avx2( XmmReg2_m32 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVSX 4-340 PAGE 1460 LINE 75788
define pcodeop vpmovsxwd_avx2 ;
:VPMOVSXWD YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x23; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovsxwd_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVSX 4-340 PAGE 1460 LINE 75791
define pcodeop vpmovsxwq_avx2 ;
:VPMOVSXWQ YmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x24; YmmReg1 ... & XmmReg2_m64
{
	YmmReg1 = vpmovsxwq_avx2( XmmReg2_m64 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVSX 4-340 PAGE 1460 LINE 75793
define pcodeop vpmovsxdq_avx2 ;
:VPMOVSXDQ YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x25; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovsxdq_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76304
define pcodeop vpmovzxbw_avx2 ;
:VPMOVZXBW YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x30; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovzxbw_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76306
define pcodeop vpmovzxbd_avx2 ;
:VPMOVZXBD YmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x31; YmmReg1 ... & XmmReg2_m64
{
	YmmReg1 = vpmovzxbd_avx2( XmmReg2_m64 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76309
define pcodeop vpmovzxbq_avx2 ;
:VPMOVZXBQ YmmReg1, XmmReg2_m32 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x32; YmmReg1 ... & XmmReg2_m32
{
	YmmReg1 = vpmovzxbq_avx2( XmmReg2_m32 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76312
define pcodeop vpmovzxwd_avx2 ;
:VPMOVZXWD YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x33; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovzxwd_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76314
define pcodeop vpmovzxwq_avx2 ;
:VPMOVZXWQ YmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x34; YmmReg1 ... & XmmReg2_m64
{
	YmmReg1 = vpmovzxwq_avx2( XmmReg2_m64 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMOVZX 4-350 PAGE 1470 LINE 76317
define pcodeop vpmovzxdq_avx2 ;
:VPMOVZXDQ YmmReg1, XmmReg2_m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG); byte=0x35; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpmovzxdq_avx2( XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULDQ 4-359 PAGE 1479 LINE 76791
define pcodeop vpmuldq_avx2 ;
:VPMULDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x28; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmuldq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULHRSW 4-362 PAGE 1482 LINE 76931
define pcodeop vpmulhrsw_avx2 ;
:VPMULHRSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x0B; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmulhrsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULHUW 4-366 PAGE 1486 LINE 77144
define pcodeop vpmulhuw_avx2 ;
:VPMULHUW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE4; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmulhuw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULHW 4-370 PAGE 1490 LINE 77373
define pcodeop vpmulhw_avx2 ;
:VPMULHW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE5; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmulhw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULLD/PMULLQ 4-374 PAGE 1494 LINE 77579
define pcodeop vpmulld_avx2 ;
:VPMULLD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x40; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmulld_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULLW 4-378 PAGE 1498 LINE 77778
define pcodeop vpmullw_avx2 ;
:VPMULLW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD5; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmullw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PMULUDQ 4-382 PAGE 1502 LINE 77973
define pcodeop vpmuludq_avx2 ;
:VPMULUDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF4; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpmuludq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# POR 4-399 PAGE 1519 LINE 78852
define pcodeop vpor_avx2 ;
:VPOR YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xEB; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpor_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSADBW 4-408 PAGE 1528 LINE 79245
define pcodeop vpsadbw_avx2 ;
:VPSADBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF6; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsadbw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSHUFB 4-412 PAGE 1532 LINE 79463
define pcodeop vpshufb_avx2 ;
:VPSHUFB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x00; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpshufb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSHUFD 4-416 PAGE 1536 LINE 79653
define pcodeop vpshufd_avx2 ;
:VPSHUFD YmmReg1, YmmReg2_m256, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG); byte=0x70; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpshufd_avx2( YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSHUFHW 4-420 PAGE 1540 LINE 79860
define pcodeop vpshufhw_avx2 ;
:VPSHUFHW YmmReg1, YmmReg2_m256, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_F3) & $(VEX_0F) & $(VEX_WIG); byte=0x70; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpshufhw_avx2( YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSHUFLW 4-423 PAGE 1543 LINE 80035
define pcodeop vpshuflw_avx2 ;
:VPSHUFLW YmmReg1, YmmReg2_m256, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_F2) & $(VEX_0F) & $(VEX_WIG); byte=0x70; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpshuflw_avx2( YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSIGNB/PSIGNW/PSIGND 4-427 PAGE 1547 LINE 80278
define pcodeop vpsignb_avx2 ;
:VPSIGNB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x08; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsignb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSIGNB/PSIGNW/PSIGND 4-427 PAGE 1547 LINE 80281
define pcodeop vpsignw_avx2 ;
:VPSIGNW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x09; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsignw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSIGNB/PSIGNW/PSIGND 4-427 PAGE 1547 LINE 80284
define pcodeop vpsignd_avx2 ;
:VPSIGND YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x0A; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsignd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSLLDQ 4-431 PAGE 1551 LINE 80488
define pcodeop vpslldq_avx2 ;
:VPSLLDQ vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x73; reg_opcode=7 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpslldq_avx2( YmmReg2, imm8:1 );
}

# PSLLW/PSLLD/PSLLQ 4-433 PAGE 1553 LINE 80638
define pcodeop vpsllw_avx2 ;
:VPSLLW YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF1; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsllw_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSLLW/PSLLD/PSLLQ 4-433 PAGE 1553 LINE 80641
:VPSLLW vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x71; reg_opcode=6 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsllw_avx2( YmmReg2, imm8:1 );
}

# PSLLW/PSLLD/PSLLQ 4-434 PAGE 1554 LINE 80656
define pcodeop vpslld_avx2 ;
:VPSLLD YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF2; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpslld_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSLLW/PSLLD/PSLLQ 4-434 PAGE 1554 LINE 80659
:VPSLLD vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x72; reg_opcode=6 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpslld_avx2( YmmReg2, imm8:1 );
}

# PSLLW/PSLLD/PSLLQ 4-434 PAGE 1554 LINE 80662
define pcodeop vpsllq_avx2 ;
:VPSLLQ YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF3; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsllq_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSLLW/PSLLD/PSLLQ 4-434 PAGE 1554 LINE 80664
:VPSLLQ vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x73; reg_opcode=6 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsllq_avx2( YmmReg2, imm8:1 );
}

# PSRAW/PSRAD/PSRAQ 4-445 PAGE 1565 LINE 81317
define pcodeop vpsraw_avx2 ;
:VPSRAW YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE1; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsraw_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSRAW/PSRAD/PSRAQ 4-445 PAGE 1565 LINE 81320
:VPSRAW vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x71; reg_opcode=4 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsraw_avx2( YmmReg2, imm8:1 );
}

# PSRAW/PSRAD/PSRAQ 4-445 PAGE 1565 LINE 81323
define pcodeop vpsrad_avx2 ;
:VPSRAD YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE2; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsrad_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSRAW/PSRAD/PSRAQ 4-445 PAGE 1565 LINE 81326
:VPSRAD vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x72; reg_opcode=4 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsrad_avx2( YmmReg2, imm8:1 );
}

# PSRLDQ 4-455 PAGE 1575 LINE 81876
define pcodeop vpsrldq_avx2 ;
:VPSRLDQ vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x73; reg_opcode=3 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsrldq_avx2( YmmReg2, imm8:1 );
}

# PSRLW/PSRLD/PSRLQ 4-457 PAGE 1577 LINE 82030
define pcodeop vpsrlw_avx2 ;
:VPSRLW YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD1; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsrlw_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSRLW/PSRLD/PSRLQ 4-457 PAGE 1577 LINE 82033
:VPSRLW vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x71; reg_opcode=2 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsrlw_avx2( YmmReg2, imm8:1 );
}

# PSRLW/PSRLD/PSRLQ 4-458 PAGE 1578 LINE 82048
define pcodeop vpsrld_avx2 ;
:VPSRLD YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD2; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsrld_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSRLW/PSRLD/PSRLQ 4-458 PAGE 1578 LINE 82051
:VPSRLD vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x72; reg_opcode=2 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsrld_avx2( YmmReg2, imm8:1 );
}

# PSRLW/PSRLD/PSRLQ 4-458 PAGE 1578 LINE 82054
define pcodeop vpsrlq_avx2 ;
:VPSRLQ YmmReg1, vexVVVV_YmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD3; YmmReg1 ... & XmmReg2_m128
{
	YmmReg1 = vpsrlq_avx2( vexVVVV_YmmReg, XmmReg2_m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSRLW/PSRLD/PSRLQ 4-458 PAGE 1578 LINE 82056
:VPSRLQ vexVVVV_YmmReg, YmmReg2, imm8 is $(VEX_NDD) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x73; reg_opcode=2 & (mod=0x3 & YmmReg2); imm8
{
	vexVVVV_YmmReg = vpsrlq_avx2( YmmReg2, imm8:1 );
}

# PSUBB/PSUBW/PSUBD 4-469 PAGE 1589 LINE 82696
define pcodeop vpsubb_avx2 ;
:VPSUBB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF8; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBB/PSUBW/PSUBD 4-469 PAGE 1589 LINE 82698
define pcodeop vpsubw_avx2 ;
:VPSUBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xF9; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBB/PSUBW/PSUBD 4-469 PAGE 1589 LINE 82700
define pcodeop vpsubd_avx2 ;
:VPSUBD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xFA; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBQ 4-476 PAGE 1596 LINE 83104
define pcodeop vpsubq_avx2 ;
:VPSUBQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xFB; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBSB/PSUBSW 4-479 PAGE 1599 LINE 83264
define pcodeop vpsubsb_avx2 ;
:VPSUBSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE8; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubsb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBSB/PSUBSW 4-479 PAGE 1599 LINE 83267
define pcodeop vpsubsw_avx2 ;
:VPSUBSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xE9; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubsw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBUSB/PSUBUSW 4-483 PAGE 1603 LINE 83504
define pcodeop vpsubusb_avx2 ;
:VPSUBUSB YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD8; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubusb_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PSUBUSB/PSUBUSW 4-483 PAGE 1603 LINE 83507
define pcodeop vpsubusw_avx2 ;
:VPSUBUSW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xD9; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsubusw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ 4-491 PAGE 1611 LINE 83940
define pcodeop vpunpckhbw_avx2 ;
:VPUNPCKHBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x68; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpckhbw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ 4-491 PAGE 1611 LINE 83942
define pcodeop vpunpckhwd_avx2 ;
:VPUNPCKHWD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x69; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpckhwd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ 4-491 PAGE 1611 LINE 83944
define pcodeop vpunpckhdq_avx2 ;
:VPUNPCKHDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x6A; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpckhdq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ 4-491 PAGE 1611 LINE 83946
define pcodeop vpunpckhqdq_avx2 ;
:VPUNPCKHQDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x6D; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpckhqdq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ 4-501 PAGE 1621 LINE 84541
define pcodeop vpunpcklbw_avx2 ;
:VPUNPCKLBW YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x60; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpcklbw_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ 4-501 PAGE 1621 LINE 84544
define pcodeop vpunpcklwd_avx2 ;
:VPUNPCKLWD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x61; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpcklwd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ 4-501 PAGE 1621 LINE 84547
define pcodeop vpunpckldq_avx2 ;
:VPUNPCKLDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x62; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpckldq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ 4-501 PAGE 1621 LINE 84550
define pcodeop vpunpcklqdq_avx2 ;
:VPUNPCKLQDQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0x6C; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpunpcklqdq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# PXOR 4-518 PAGE 1638 LINE 85497
define pcodeop vpxor_avx2 ;
:VPXOR YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG) & vexVVVV_YmmReg; byte=0xEF; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpxor_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VEXTRACTI128/VEXTRACTI32x4/VEXTRACTI64x2/VEXTRACTI32x8/VEXTRACTI64x4 5-106 PAGE 1930 LINE 99432
define pcodeop vextracti128_avx2 ;
:VEXTRACTI128 XmmReg2_m128, YmmReg1, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0); byte=0x39; YmmReg1 ... & XmmReg2_m128; imm8
{
	XmmReg2_m128 = vextracti128_avx2( YmmReg1, imm8:1 );
	# TODO ZmmReg2 = zext(XmmReg2)
}

# VGATHERDPD/VGATHERQPD 5-251 PAGE 2075 LINE 106903
# INFO mnemonic VGATHERDPD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPD/VGATHERQPD 5-251 PAGE 2075 LINE 106908
# INFO mnemonic VGATHERQPD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPD/VGATHERQPD 5-251 PAGE 2075 LINE 106913
# INFO mnemonic VGATHERDPD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPD/VGATHERQPD 5-251 PAGE 2075 LINE 106918
# INFO mnemonic VGATHERQPD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPS/VGATHERQPS 5-256 PAGE 2080 LINE 107130
# INFO mnemonic VGATHERDPS was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPS/VGATHERQPS 5-256 PAGE 2080 LINE 107135
# INFO mnemonic VGATHERQPS was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPS/VGATHERQPS 5-256 PAGE 2080 LINE 107140
# INFO mnemonic VGATHERDPS was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VGATHERDPS/VGATHERQPS 5-256 PAGE 2080 LINE 107145
# INFO mnemonic VGATHERQPS was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDD/VPGATHERQD 5-273 PAGE 2097 LINE 107884
# INFO mnemonic VPGATHERDD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDD/VPGATHERQD 5-273 PAGE 2097 LINE 107888
# INFO mnemonic VPGATHERQD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDD/VPGATHERQD 5-273 PAGE 2097 LINE 107892
# INFO mnemonic VPGATHERDD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDD/VPGATHERQD 5-273 PAGE 2097 LINE 107896
# INFO mnemonic VPGATHERQD was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDQ/VPGATHERQQ 5-280 PAGE 2104 LINE 108234
# INFO mnemonic VPGATHERDQ was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDQ/VPGATHERQQ 5-280 PAGE 2104 LINE 108238
# INFO mnemonic VPGATHERQQ was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDQ/VPGATHERQQ 5-280 PAGE 2104 LINE 108242
# INFO mnemonic VPGATHERDQ was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPGATHERDQ/VPGATHERQQ 5-280 PAGE 2104 LINE 108246
# INFO mnemonic VPGATHERQQ was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VINSERTI128/VINSERTI32x4/VINSERTI64x2/VINSERTI32x8/VINSERTI64x4 5-314 PAGE 2138 LINE 109927
# INFO mnemonic VINSERTI128 was found in ../../../Processors/x86/data/languages/avx2_manual.sinc

# VPBLENDD 5-321 PAGE 2145 LINE 110309
define pcodeop vpblendd_avx2 ;
:VPBLENDD XmmReg1, vexVVVV_XmmReg, XmmReg2_m128, imm8 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x02; (XmmReg1 & YmmReg1) ... & XmmReg2_m128; imm8
{
	local tmp:16 = vpblendd_avx2( vexVVVV_XmmReg, XmmReg2_m128, imm8:1 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPBLENDD 5-321 PAGE 2145 LINE 110312
:VPBLENDD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, imm8 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x02; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpblendd_avx2( vexVVVV_YmmReg, YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110776
define pcodeop vpbroadcastb_avx2 ;
:VPBROADCASTB XmmReg1, XmmReg2_m8 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x78; (XmmReg1 & YmmReg1) ... & XmmReg2_m8
{
	local tmp:16 = vpbroadcastb_avx2( XmmReg2_m8 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110778
:VPBROADCASTB YmmReg1, XmmReg2_m8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x78; YmmReg1 ... & XmmReg2_m8
{
	YmmReg1 = vpbroadcastb_avx2( XmmReg2_m8 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110787
define pcodeop vpbroadcastw_avx2 ;
:VPBROADCASTW XmmReg1, XmmReg2_m16 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x79; (XmmReg1 & YmmReg1) ... & XmmReg2_m16
{
	local tmp:16 = vpbroadcastw_avx2( XmmReg2_m16 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110789
:VPBROADCASTW YmmReg1, XmmReg2_m16 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x79; YmmReg1 ... & XmmReg2_m16
{
	YmmReg1 = vpbroadcastw_avx2( XmmReg2_m16 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110800
define pcodeop vpbroadcastd_avx2 ;
:VPBROADCASTD XmmReg1, XmmReg2_m32 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x58; (XmmReg1 & YmmReg1) ... & XmmReg2_m32
{
	local tmp:16 = vpbroadcastd_avx2( XmmReg2_m32 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110802
:VPBROADCASTD YmmReg1, XmmReg2_m32 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x58; YmmReg1 ... & XmmReg2_m32
{
	YmmReg1 = vpbroadcastd_avx2( XmmReg2_m32 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110813
define pcodeop vpbroadcastq_avx2 ;
:VPBROADCASTQ XmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x59; (XmmReg1 & YmmReg1) ... & XmmReg2_m64
{
	local tmp:16 = vpbroadcastq_avx2( XmmReg2_m64 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPBROADCAST 5-331 PAGE 2155 LINE 110815
:VPBROADCASTQ YmmReg1, XmmReg2_m64 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x59; YmmReg1 ... & XmmReg2_m64
{
	YmmReg1 = vpbroadcastq_avx2( XmmReg2_m64 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPBROADCAST 5-332 PAGE 2156 LINE 110843
define pcodeop vbroadcasti128_avx2 ;
:VBROADCASTI128 YmmReg1, m128 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0); byte=0x5A; YmmReg1 ... & m128
{
	YmmReg1 = vbroadcasti128_avx2( m128 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPERM2I128 5-360 PAGE 2184 LINE 112312
define pcodeop vperm2i128_avx2 ;
:VPERM2I128 YmmReg1, vexVVVV_YmmReg, YmmReg2_m256, imm8 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x46; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vperm2i128_avx2( vexVVVV_YmmReg, YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPERMD/VPERMW 5-362 PAGE 2186 LINE 112405
define pcodeop vpermd_avx2 ;
:VPERMD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x36; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpermd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPERMPD 5-381 PAGE 2205 LINE 113452
define pcodeop vpermpd_avx2 ;
:VPERMPD YmmReg1, YmmReg2_m256, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W1); byte=0x01; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpermpd_avx2( YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPERMPS 5-384 PAGE 2208 LINE 113633
define pcodeop vpermps_avx2 ;
:VPERMPS YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x16; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpermps_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPERMQ 5-387 PAGE 2211 LINE 113768
define pcodeop vpermq_avx2 ;
:VPERMQ YmmReg1, YmmReg2_m256, imm8 is $(VEX_NONE) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W1); byte=0x00; YmmReg1 ... & YmmReg2_m256; imm8
{
	YmmReg1 = vpermq_avx2( YmmReg2_m256, imm8:1 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114262
define pcodeop vpmaskmovd_avx2 ;
:VPMASKMOVD XmmReg1, vexVVVV_XmmReg, m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x8C; (XmmReg1 & YmmReg1) ... & m128
{
	local tmp:16 = vpmaskmovd_avx2( vexVVVV_XmmReg, m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114264
:VPMASKMOVD YmmReg1, vexVVVV_YmmReg, m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x8C; YmmReg1 ... & m256
{
	YmmReg1 = vpmaskmovd_avx2( vexVVVV_YmmReg, m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114266
define pcodeop vpmaskmovq_avx2 ;
:VPMASKMOVQ XmmReg1, vexVVVV_XmmReg, m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_XmmReg; byte=0x8C; (XmmReg1 & YmmReg1) ... & m128
{
	local tmp:16 = vpmaskmovq_avx2( vexVVVV_XmmReg, m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114268
:VPMASKMOVQ YmmReg1, vexVVVV_YmmReg, m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_YmmReg; byte=0x8C; YmmReg1 ... & m256
{
	YmmReg1 = vpmaskmovq_avx2( vexVVVV_YmmReg, m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114270
:VPMASKMOVD m128, vexVVVV_XmmReg, XmmReg1 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x8E; XmmReg1 ... & m128
{
	m128 = vpmaskmovd_avx2( vexVVVV_XmmReg, XmmReg1 );
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114272
:VPMASKMOVD m256, vexVVVV_YmmReg, YmmReg1 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x8E; YmmReg1 ... & m256
{
	m256 = vpmaskmovd_avx2( vexVVVV_YmmReg, YmmReg1 );
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114274
:VPMASKMOVQ m128, vexVVVV_XmmReg, XmmReg1 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_XmmReg; byte=0x8E; XmmReg1 ... & m128
{
	m128 = vpmaskmovq_avx2( vexVVVV_XmmReg, XmmReg1 );
}

# VPMASKMOV 5-397 PAGE 2221 LINE 114276
:VPMASKMOVQ m256, vexVVVV_YmmReg, YmmReg1 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_YmmReg; byte=0x8E; YmmReg1 ... & m256
{
	m256 = vpmaskmovq_avx2( vexVVVV_YmmReg, YmmReg1 );
}

# VPSLLVW/VPSLLVD/VPSLLVQ 5-445 PAGE 2269 LINE 116620
define pcodeop vpsllvd_avx2 ;
:VPSLLVD XmmReg1, vexVVVV_XmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x47; (XmmReg1 & YmmReg1) ... & XmmReg2_m128
{
	local tmp:16 = vpsllvd_avx2( vexVVVV_XmmReg, XmmReg2_m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPSLLVW/VPSLLVD/VPSLLVQ 5-445 PAGE 2269 LINE 116623
define pcodeop vpsllvq_avx2 ;
:VPSLLVQ XmmReg1, vexVVVV_XmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_XmmReg; byte=0x47; (XmmReg1 & YmmReg1) ... & XmmReg2_m128
{
	local tmp:16 = vpsllvq_avx2( vexVVVV_XmmReg, XmmReg2_m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPSLLVW/VPSLLVD/VPSLLVQ 5-445 PAGE 2269 LINE 116626
:VPSLLVD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x47; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsllvd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPSLLVW/VPSLLVD/VPSLLVQ 5-445 PAGE 2269 LINE 116629
:VPSLLVQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_YmmReg; byte=0x47; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsllvq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPSRAVW/VPSRAVD/VPSRAVQ 5-450 PAGE 2274 LINE 116874
define pcodeop vpsravd_avx2 ;
:VPSRAVD XmmReg1, vexVVVV_XmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x46; (XmmReg1 & YmmReg1) ... & XmmReg2_m128
{
	local tmp:16 = vpsravd_avx2( vexVVVV_XmmReg, XmmReg2_m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPSRAVW/VPSRAVD/VPSRAVQ 5-450 PAGE 2274 LINE 116877
:VPSRAVD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x46; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsravd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPSRLVW/VPSRLVD/VPSRLVQ 5-455 PAGE 2279 LINE 117139
define pcodeop vpsrlvd_avx2 ;
:VPSRLVD XmmReg1, vexVVVV_XmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_XmmReg; byte=0x45; (XmmReg1 & YmmReg1) ... & XmmReg2_m128
{
	local tmp:16 = vpsrlvd_avx2( vexVVVV_XmmReg, XmmReg2_m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPSRLVW/VPSRLVD/VPSRLVQ 5-455 PAGE 2279 LINE 117142
define pcodeop vpsrlvq_avx2 ;
:VPSRLVQ XmmReg1, vexVVVV_XmmReg, XmmReg2_m128 is $(VEX_NDS) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_XmmReg; byte=0x45; (XmmReg1 & YmmReg1) ... & XmmReg2_m128
{
	local tmp:16 = vpsrlvq_avx2( vexVVVV_XmmReg, XmmReg2_m128 );
	YmmReg1 = zext(tmp);
	# TODO ZmmReg1 = zext(XmmReg1)
}

# VPSRLVW/VPSRLVD/VPSRLVQ 5-455 PAGE 2279 LINE 117145
:VPSRLVD YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W0) & vexVVVV_YmmReg; byte=0x45; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsrlvd_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

# VPSRLVW/VPSRLVD/VPSRLVQ 5-455 PAGE 2279 LINE 117148
:VPSRLVQ YmmReg1, vexVVVV_YmmReg, YmmReg2_m256 is $(VEX_NDS) & $(VEX_L256) & $(VEX_PRE_66) & $(VEX_0F38) & $(VEX_W1) & vexVVVV_YmmReg; byte=0x45; YmmReg1 ... & YmmReg2_m256
{
	YmmReg1 = vpsrlvq_avx2( vexVVVV_YmmReg, YmmReg2_m256 );
	# TODO ZmmReg1 = zext(YmmReg1)
}

