/*-
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 *
 *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
 *   All rights reserved.
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 *       notice, this list of conditions and the following disclaimer.
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 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
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 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
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 */

#ifndef _IXGBE_BYPASS_H_
#define _IXGBE_BYPASS_H_

#ifdef RTE_LIBRTE_IXGBE_BYPASS

struct ixgbe_bypass_mac_ops {
	s32 (*bypass_rw)(struct ixgbe_hw *hw, u32 cmd, u32 *status);
	bool (*bypass_valid_rd)(u32 in_reg, u32 out_reg);
	s32 (*bypass_set)(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
	s32 (*bypass_rd_eep)(struct ixgbe_hw *hw, u32 addr, u8 *value);
};

struct ixgbe_bypass_info {
	uint64_t reset_tm;
	struct ixgbe_bypass_mac_ops ops;
};

struct rte_eth_dev;

void ixgbe_bypass_init(struct rte_eth_dev *dev);
s32 ixgbe_bypass_state_show(struct rte_eth_dev *dev, u32 *state);
s32 ixgbe_bypass_state_store(struct rte_eth_dev *dev, u32 *new_state);
s32 ixgbe_bypass_event_show(struct rte_eth_dev *dev, u32 event, u32 *state);
s32 ixgbe_bypass_event_store(struct rte_eth_dev *dev, u32 event, u32 state);
s32 ixgbe_bypass_wd_timeout_store(struct rte_eth_dev *dev, u32 timeout);
s32 ixgbe_bypass_ver_show(struct rte_eth_dev *dev, u32 *ver);
s32 ixgbe_bypass_wd_timeout_show(struct rte_eth_dev *dev, u32 *wd_timeout);
s32 ixgbe_bypass_wd_reset(struct rte_eth_dev *dev);

s32 ixgbe_bypass_init_shared_code(struct ixgbe_hw *hw);
s32 ixgbe_bypass_init_hw(struct ixgbe_hw *hw);

#endif /* RTE_LIBRTE_IXGBE_BYPASS */

#endif /*  _IXGBE_BYPASS_H_ */
